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SiliconPath

Curriculum Directory

15 Structured Learning Paths

From digital logic foundations to advanced physical design and timing signoff. 150 self-paced modules, completely free and open.

Foundations

Foundations

Digital circuits, binary logic, HDL description, and functional verification.

Beginner11 modules

Digital Electronics

Master the fundamentals of digital logic, from binary arithmetic to error correction codes.

Beginner14 modules

Verilog

Learn Verilog from scratch — from your first module to synthesizable RTL design.

Verilog
~121 minExplore Path
Intermediate8 modules

Hardware Protocols

Understand the bus and serial protocols that connect chips — from handshakes to AXI.

AXIAPBAHBSPII2CUART
Beginner13 modules

Design Verification

From first testbench to UVM mastery — learn the verification methodologies used in industry.

SystemVerilogUVM
~126 minExplore Path
Intermediate8 modules

Clock Domain Crossing

Safely transfer data between clock domains — from metastability to async FIFOs.

Backend & Signoff (RTL to GDSII)

Backend & Signoff (RTL to GDSII)

Physical implementation, clock tree synthesis, routing, STA, and signoff checks.

Beginner11 modules

Synthesis

Transform RTL into gates — master the synthesis flow from constraints to QoR.

Synopsys Design CompilerCadence Genus
Intermediate11 modules

Physical Design

From floorplan to tapeout — master the physical implementation of digital chips.

Synopsys ICC2Cadence Innovus
Intermediate13 modules

Static Timing Analysis

Analyze timing paths, close timing, and ensure your design meets specs.

Synopsys PrimeTimeCadence Tempus
Intermediate12 modules

Physical Verification

Ensure your layout is manufacturable — DRC, LVS, ERC, and advanced checks.

Synopsys IC ValidatorCadence Pegasus
Advanced13 modules

Low Power Design & UPF

Master power management — from clock gating to UPF-based power-aware design.

UPFSynopsys LP ToolsCadence CPF
Intermediate8 modules

Design for Test

Make your chips testable — scan chains, ATPG, MBIST, and DFT flows.

Synopsys DFT CompilerCadence Modus

Tools & Career

Tools & Career

EDA scripting automation, Linux fundamentals, roadmap planning, and interview prep.

Beginner7 modules

TCL for EDA

Learn the scripting language that powers every EDA tool — from variables to report parsing.

TCL
Beginner7 modules

Linux for VLSI

Navigate the Linux environment where all VLSI work happens — from shells to remote servers.

LinuxBash
All levels5 modules

Interview Q&A

Ace your VLSI interviews — curated questions for synthesis, PD, and STA roles.

All levels9 modules

Career Roadmap

Plan your VLSI career — from choosing a domain to landing your first role.

NPTEL & YouTube Video Course Library

74 curated free video courses from NPTEL IITs and Neso Academy / VLSI Academy playlists, mapped to these learning paths.

Browse Video Courses