Practice Repository

55 STA Interview Questions & Answers

Exhaustive Static Timing Analysis interview preparation. Covering setup/hold closure, clock uncertainty, CRPR, crosstalk noise, multi-corner analysis, and SDC constraints.

Showing 55 of 55 questions

STA Fundamentals

5 questions

Timing Paths & Path Types

5 questions

Setup & Hold Checks

5 questions

Clocks: Skew, Jitter, Latency, Uncertainty

5 questions

Slack, Slew & Transition

5 questions

Timing Exceptions

5 questions

OCV, AOCV, POCV & Derating

5 questions

CRPR & Clock Reconvergence

5 questions

Crosstalk & Signal Integrity

5 questions

SDC Constraints

5 questions

Advanced & Signoff

5 questions

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55 STA Interview Questions & Answers

STA Fundamentals

What is Static Timing Analysis and why is it preferred over simulation?

What is a timing path in STA?

What is the difference between max delay (setup) and min delay (hold) analysis?

What are the different types of timing paths?

What is the difference between ideal and propagated clocks?

Timing Paths & Path Types

How does STA identify the critical path?

What is a clock path and how is it treated differently from a data path?

What is the difference between a constrained and unconstrained path?

What is a multicycle path and when would you use one?

What is a false path and how does it differ from a multicycle path?

Setup & Hold Checks

Write the setup timing equation. What are all the terms?

Write the hold timing equation. Why is hold analysis done at the fast corner?

How do you fix a setup violation without creating a hold violation?

What is the relationship between setup time, hold time, and clock-to-q delay?

What happens if you only close setup and ignore hold?

Clocks: Skew, Jitter, Latency, Uncertainty

What is clock skew and what causes it?

What is clock jitter and how does it differ from skew?

What is clock latency and what is the difference between network and source latency?

How is clock uncertainty modeled in STA?

What is the difference between global skew and local skew?

Slack, Slew & Transition

What is slack and how is it calculated?

What is signal slew (transition time) and why does it matter?

What is WNS, TNS, and WHS?

How do slew and capacitance affect each other?

What is the difference between max_transition and max_capacitance constraints?

Timing Exceptions

What are the main types of timing exceptions in SDC?

When would you use set_false_path vs set_clock_groups?

What is a multicycle path exception and what is the common pitfall?

What does set_disable_timing do and when should you use it?

How do you handle cross-clock domain paths in STA?

OCV, AOCV, POCV & Derating

What is On-Chip Variation (OCV) and why is it needed?

What is AOCV (Advanced OCV) and how does it improve over basic OCV?

What is POCV (Parametric OCV) and how does it differ from AOCV?

What is the difference between setup derating and hold derating?

What isCPPR and how does it relate to OCV?

CRPR & Clock Reconvergence

What is CRPR (Clock Path Pessimism Removal)?

What is clock reconvergence and why is it a problem?

How does the tool handle the difference between CPPR and CRPR?

What is the role of clock tree topology in CRPR effectiveness?

Can CRPR ever be harmful or over-applied?

Crosstalk & Signal Integrity

What is crosstalk and how does it affect timing?

What is the difference between crosstalk delay and crosstalk noise?

What design techniques mitigate crosstalk?

How does crosstalk analysis differ from timing analysis?

What is a crosstalk-induced hold violation and how do you fix it?

SDC Constraints

What is SDC and what are its main constraint types?

How do you define a clock in SDC? What about generated clocks?

What is the difference between set_input_delay and set_output_delay?

What are set_clock_groups and when should you use them?

How do you handle multiple operating modes in SDC?

Advanced & Signoff

What is MMMC (Multi-Mode Multi-Corner) analysis?

What is timing signoff and what does it guarantee?

What is timing derating and how do you set it?

What is SI-aware timing and why is it needed for signoff?

What is timing margin borrowing and how does it work?

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