Physical Verification
Ensure your layout is manufacturable — DRC, LVS, ERC, and advanced checks.
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Curriculum Syllabus
All modules are open and public. Jump directly into what you need or follow in sequence.
Overview
Introduction to physical verification in the chip design flow.
PV Flow Overview
The complete physical verification process and signoff checks.
DRC - Design Rule Check
Running and fixing design rule violations for manufacturability.
LVS - Layout vs. Schematic
Verifying layout matches the schematic design intent.
ERC - Electrical Rule Check
Checking for electrical rule violations and reliability issues.
Antenna Check
Preventing antenna effects during metal layer processing.
Metal Fill & Density Rules
Adding metal fill to meet density requirements for manufacturing.
PV Tool Knowledge
Key physical verification tools and their capabilities.
Physical Verification - Interview Questions
Common interview questions for physical verification roles.
Multi-Patterning and Coloring Checks
Advanced patterning techniques and coloring rule verification.
DFM and Lithography Hotspots
Design for manufacturability and lithography analysis.
LVS Debugging Methodology
Systematic approach to debugging LVS mismatches.